Erik J Kielin

USPTO Patent Examiner·Active 2012 to 2013

Erik J Kielin is a USPTO patent examiner who has handled 12 ex parte reexaminations between 2012 and 2013. These reexams concentrate in Electrical & Electronic, Mechanical Engineering, and Chemistry & Materials. ExamPat indexes the full prosecution record for each of these cases, including office-action grounds, certificate outcomes, and downstream PTAB and federal-circuit decisions.

Filings by year

5
12
7
13

Technology mix

Electrical & Electronic8 (67%)
Mechanical Engineering2 (17%)
Chemistry & Materials1 (8%)
Physics & Instruments1 (8%)

Compare against all examiners

Eight side-by-side metrics: case volume, pendency, OAs per reexam, rejection mix, SNQ denial rate, certification rate, and PTAB appeal rate, with a Δ column showing where this examiner runs higher or lower than the corpus.

  • Average and median pendency, both for this examiner and the corpus
  • Rejection basis split (102 / 103 / 112) head-to-head
  • Certification, SNQ denial, and PTAB appeal rates

Certificate outcome distribution

How this examiner's certificates split across the six possible outcomes: all claims confirmed, confirmed with amendment, confirmed with new claims, mixed, or all claims canceled. Includes share comparison to the corpus distribution.

  • Count and share for each of the six outcome buckets
  • Δ vs. corpus distribution in percentage points
  • Useful for setting realistic patent-owner expectations

Event-to-event timing

Median time for this examiner's cases at each prosecution stage — filing to first office action, filing to NIRC, and filing to certificate — with corpus comparison and sample size.

  • Median in months per transition
  • Side-by-side with the corpus median
  • n column showing how many of this examiner's cases completed each transition

Recent reexaminations (12)

Control #FiledPatentTitlePendencyStatus
90/013,081Dec 5, 20135,684,863Telephonic-Interface Statistical Analysis System6 moClosed
90/020,038Nov 19, 20137,719,020(AL,GA,IN)N AND ZNO DIRECT WAFER BONDED STRUCTURE FOR OPTOELECTRONIC APPLICATIONS, AND ITS FABRICATION METHOD10 moClosed
90/020,041Nov 19, 20137,737,434LIGHT-EMITTING DIODE ILLUMINATION SOURCE6 moClosed
90/020,045Nov 19, 20137,749,780POLYMER OPTOELECTRONIC DEVICE AND METHODS FOR MAKING THE SAME10 moClosed
90/020,046Nov 19, 20137,745,814POLYCHROMATIC LED'S AND RELATED SEMICONDUCTOR DEVICES11 moClosed
90/012,959Aug 27, 20136,634,770LIGHT SOURCE USING SEMICONDUCTOR DEVICES MOUNTED ON A HEAT SINK12 moClosed
90/012,957Aug 26, 20136,465,961SEMICONDUCTOR LIGHT SOURCE USING A HEAT SINK WITH A PLURALITY OF PANELS12 moClosed
90/012,730Dec 3, 20128,026,479Systems and Methods for Analyzing Substances Using a Mass Spectrometer11 moClosed
90/012,480Sep 10, 20125,672,535METHOD OF FABRICATING DRAM CELL WITH SELF-ALIGNED CONTACT9 moClosed
90/012,250Apr 11, 20126,908,316ELECTRICAL CONNECTOR WITH ACCURATE MEASURING BENCHMARKS27 moClosed
90/012,162Feb 24, 20126,403,980THIN FILM TRANSISTOR ARRAY PANEL FOR LIQUID CRYSTAL DISPLAY18 moClosed
90/012,077Jan 5, 20125,672,535METHOD OF FABRICATION DRAM CELL WITH SELF-ALIGNED CONTACT17 moClosed

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